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Friday, October 30 • 10:00 - 10:30
Hypervisor-managed Linear Address Translation - Chao Gao, Intel

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Some security features (e.g. write-protect kernel code, SMEP) are deployed in kernel to raise the bar of vulnerability exploitation. In practice, attackers would defeat or turn off these security features first. A typical way is by breaking code/data integrity of security features through editing page tables. In this case, enforcing linear translation is important to prevent security features being bypassed. But existing approaches to enforce guest linear translation generally lead to much overhead as guest page table changes and CR3 loading must be trapped by VMM. With HLAT enabled, VMM don’t need to monitor guest CR3 page table changes, thus reduces most overhead and improve efficiency. This presentation will first introduce the hardware extensions in HLAT, and then discuss how to build an efficient solution in KVM to enforce guest linear translation.


Chao Gao

Cloud Software Engineer, Intel
Chao has work for Intel for 4 years as a software engineer. He is responsible for enabling new Intel virtualization features in KVM/Xen and is familiar with interrupt virtualization, performance tuning and virtualization base security. Currently, Chao is working on using HLAT to enhance... Read More →

Friday October 30, 2020 10:00 - 10:30 GMT
KVM Theater
  KVM Forum, KVM